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opentag:platforms:stm32l1xx

STM32L1xx MCU Platform

The ST32L15x microcontroller is a Cortex M3-based MCU from STMicroelectronics that offers much lower power sleep modes than does the normal STM32F10x series MCU. Additionally, it has the following features that make it appealing to usage with OpenTag for low-power applications:

  • Retains SRAM during most low power modes, including a ~4.4µA mode
  • RTC wakeup from deep sleep modes
  • Supports clocking TIM9 from an external 32768Hz crystal, which is ideal for OpenTag
  • 230µA/MHz when running from Flash
  • 1.03 DMIPS/MHz, so clock can be kept relatively low.
  • Up to 32 MHz clock speed, so complex jobs like DSP or cryptography are possible.
  • Up to 384KB on-chip Flash, so large data logs are possible

These attributes make the STM32L one of the best MCU platforms for battery-powered, feature-rich applications (as of writing, 03/2012).

Implementation Notes

OpenTag has been implemented on the STM32L via the Semtech DK7A433 Board as well as the SX1231+H152 Prototype Board. Some notes have been supplied by the development team that made this port possible.

GP-timer implementation

The OpenTag kernel timer (GPTIM) is supplied by TIM9. TIM9/10/11 can be driven from the 32768Hz crystal. Using a prescaler of 32, TIM9 can provide the 1024Hz tick rate required by OpenTag/DASH7.

STM32L timers can behave identically to MSP430's “up” mode by setting both compare and auto-reload registers to the value at which an interrupt will be generated by this timer.

  • This “up” counting mode is used when platform_ot_run() needs to be called at the timer interrupt interval.
  • This mode is also entered when calling platform_ot_preempt(), which asynchronously calls platform_ot_run()

Alternately, the MSP430's “continuous” mode is achieved on the STM32L by setting the auto-reload register to 0xffff, and disabling the interrupt from this timer. This method is by platform_ot_pause(), for example, which pauses the kernel indefinitely until platform_ot_preempt() is called.

Veelite (Filesystem) Implementation

The STM32L151 and L152 microcontrollers include 4096 bytes of data EEPROM, which can be erased or rewritten one word at a time (unlike flash, which can usually only be erased or rewritten one block at a time). This has implications to the implementation of the Veelite Core.

  • Location in the memory space is 0x0808 0000 to 0x0808 0fff
  • Endurance specification is 300,000 erase-write cycles.
  • Data size (4KB) is sufficient for mounting a basic OpenTag filesystem, therefore removing the requirement for flash wear leveling in applications that use 4KB data or less.
  • If the application requires more than 4KB of filesystem data, the data EEPROM may be used to store the flash wear leveling mapping table. In this scenario, the system is very robust because spontaneous power-off will not wipe the mapping table as it would in systems where the table is stored in SRAM. In those platforms (e.g. CC430), power-down saving routines are necessary, but on the STM32L, the power only needs to be maintained during the Flash erase/write operations themselves. Normal capacitors are typically capable of doing so.

MPipe Implementation

STM32L has several serial ports, including: Full speed USB device, I2C, SPI, and USART. For board-to-board applications, generally I2C, SPI, or UART might be used. For board-to-client applications, the natural choices are USB or UART.

  • The STM32F USB virtual COM port MPipe may be ported to STM32L without a great deal of effort, but at the time of writing (03/2012) this port has not been completed.
  • For UART MPipe, USART1, 2, or 3 may be used, however USART3 may be the most convenient target due to the prexisting NDEF dumb terminal software. UARTs are inherently character-based. Multi-byte messages are not framed, unless software provides framing. The implication is missing characters or extra characters must be provisioned for, with the goal of correctly parsing following messages. By contrast, I2C includes inherent message framing with its start condition and stop condition.

MPipe's NDEF Short Record format is used in the following configuration:

  • FLAGS: TNF is set to 5, meaning “unknown”. MB/ME always set, CF always clear, IL always 1.
  • TYPE LENGTH is always zero (when TNF = 5).
  • For further clarification, see NDEF specification at Section 3.2.4
  • Main item needs resolving: Should added sequence/CRC bytes at end of message add to PAYLOAD LENGTH value?

Boards That Use STM32L1xx

Board Name/Link STM32 Variant Radio Features
DK7A433 Semtech SX1212 DASH7 dev kit STM32L151CBT6 SX1212 16KB SRAM, 128KB Flash, integrated USB, 2 LED, integrated antenna
SX1231 Proto-H152 SX1231 + Olimex H152 Protoboard STM32L152VBT6 SX1231 16KB SRAM, 128KB Flash, integrated USB
opentag/platforms/stm32l1xx.txt · Last modified: 2012/03/08 20:26 by jpnorair